XL Graphics uses the CPU to implement the IRIS Graphics Library application programming interface rather than having a dedicated Geometry Engine. XL Graphics, shown in block diagram in Figure 8, provides high resolution, full 24-bit color and includes the following:
FIGURE 8: The XL Graphics Board. The shaded boxes show Silicon Graphics-designed ASICs.
The main bus on the XL Graphics board provides a communication path between the elements of the graphics subsystem. The XL Graphics board is connected to the GIO64 bus via the REX3 ASIC, which can access data from the CPU at a burst rate of 267 MBytes per second.
The CPU uses the IRIS GL to transform three-dimensional polygons to 2D screen coordinates, decompose them into triangles, and finally decompose the triangles into spans by exact point sampling of the triangle's interior. These spans are then passed on to the REX3 ASIC, which interpolates them and renders the results into the framebuffer.
Figure 9 shows how 3D polygons are processed by the CPU and the REX3 ASIC. All transformation, clipping, and lighting calculations for points, lines, and polygons are performed in software by the CPU, including Z-buffer calculations, which are implemented in 32-bit resolution without the use of dedicated Z-buffer bitplanes.
FIGURE 9 XL Graphics processing. The majority of XL Graphics computation is performed in software by the CPU.
XL Graphics offers several advantages in speed and flexibility over hardware-based graphics systems:
REX3 supports both flat and linear (Gouraud) shading in both color index and RGB formats with optional dithering. The peak fill rates for the REX3 are:
Pixel planes hold 24 bits of information for each pixel of the display. In single buffer mode, the framebuffer contains a 12-bit color index or 24-bit RGB (8 bits each for red, green, and blue).
Pop-up planes, holding 2 bits per pixel, are used for pop-up menus, dialog boxes, and other components of a graphical user interface that temporarily obscure the image.
Clipping ID planes, also holding 2 bits per pixel, store information about which parts of windows are visible on the display. Multiple windows can overlap each other, totally or partially obscuring their contents. Individual pixels can be masked against a window boundary, thereby supporting non-rectangular windows without imposing additional overhead on the window system. The clipping ID (CID) planes are in the framebuffer VRAM.
The overlay planes on XL Graphics hold 8 bits per pixel.
The framebuffer is connected to the REX3 ASIC via the RB2s. Full use of the VRAM bandwidth is realized through a 128 pixel wide data path that connects the framebuffer to the RB2 ASIC. The framebuffer displays to a 1024 x 768 or 1280 x 1024 pixel monitor.
Depending on the mode, each pixel to be displayed is formatted with an offset of n x 256 in order to index the desired section of the CMAP RAM as shown in Figure 10. This resulting lookup index is passed to the CMAP ASICs which generate 24-bit RGB values for display. These values finally enter the RAMDAC where they are gamma-corrected for the monitor by the use of a second level of lookup tables, and analog RGB output is produced.
FIGURE 10 Organisation of the CMAP RAM (indexed by row).